A team from the Shanghai Institute of Microsystem and Information Technology, led by Zheng Jia and Wan Ziqi, has won the top prize at the eighth China College Integrated Circuit Competition, beating out 24 other finalists.
The competition focuses on chip digital module design, specifically high-speed multi-port shared cache management, which is crucial for the advancement of network switching technology.
With the advent of 40G and 100G networks, data storage demands for network devices have surged. "Our entry aims to solve key issues in large-capacity switching and high-speed storage," explained Zheng Jia. Their project, "Heterogeneous Cache Management Module based on Memory Paging and Linked Lists", uses a hybrid of static random-access memory and phase-change memory to maximize memory resource utilization. This innovation promises low-cost, high-speed storage management for routers and switches.
"The competition involved tasks like specification design and logic code writing, which enhanced our digital circuit skills and understanding of network switching technology," said Wan Ziqi. Under the guidance of researchers Song Zhitang and Zhou Xilin, the team overcame initial challenges through extensive research.
Zhou Xilin hopes the team will continue improving the project, leveraging phase-change memory's high reliability and low cost to drive industrial application.
The competition attracted over 430 institutions and more than 5,600 teams, highlighting a growing interest in integrated circuit innovation.